The present invention relates to parallel adders and more particularly to binary MOS switched-carry parallel adders.
In a book by A. Shah et al, "Integrierte Schaltengen in digitalen Systemen", Vol. 2, Basel, 1977, switched-carry parallel adders are described on pages 85 to 109 and particularly on pages 103 to 105. For the electronic changeover switch which switches the carry signals of the individual stages from stage to stage in response to the two output signals of the half-adder combining the digit signals, only an implementation with bipolar transistors is given which includes three such transistors, a diode, and three resistors. As for the implementation of the half-adders, which are only given in the form of block diagrams, reference is made to commercially available bipolar integrated circuits on pages 87 to 103 of the above book.
Direct application of the fundamental principles of conventional parallel adders, explained with reference to the aforementioned bipolar integrated circuits, to integrated circuits using insulated-gate field-effect transistors, i.e., to so-called MOS circuits, is not readily possible because MOS technology and bipolar technology differ widely in some respects.